1. Field of the Invention
The present invention generally relates to a communication system, and more particularly to a clock generator and a method of generating a clock signal adaptable to the communication system.
2. Description of Related Art
In a communication system constructed in a serializer/deserializer (Ser/Des) interface architecture, a SerDes link or serial bus, such as Universal Serial Bus (USB), Serial Advanced Technology Attachment (SATA) or Peripheral Component Interconnect Express (PCI Express), is generally utilized to connect a host with an electronic device. FIG. 1 shows a block diagram illustrative of a conventional communication system. The system generally includes a host 11 and an electronic device 12. A synthesizer 13, such as a phase-locked loop (PLL) or a spread spectrum clock generator (SSCG), is commonly used with the transmitter/receiver 121/122 of the electronic device 12. It is noted that a resonator 14 (e.g., a quartz crystal, LC tank or RC bank) is required to work with the synthesizer 13 or the host 11 to provide a stable and accurate clock source. However, as the resonator 14 is oftentimes bulky and/or consumes substantive power, some highly integrated systems such as a pen drive thus cannot afford enough space or power. Although an embedded oscillator based on chip-on-board (COB) technique has been proposed, the additionally incurred cost, however, outweighs its benefit.
Accordingly, a need has arisen to propose a novel scheme and method of generating a clock signal for optimizing area and power consumption in a cost efficient manner.